In packaging integrated circuits, it is desirable to provide a package that allows for multiple semiconductor die within the package. There are several advantages to including multiple die within one package. For example, packaging costs can be reduced and the amount of space required on a printed circuit board can be reduced. One way to accommodate multiple die within a package is to stack one die on top of another die. However, one problem with the stacked die solution is that thermal dissipation of the die on top of the stack is through the bottom die. For packaged high power devices, the amount of heat that can be dissipated through the bottom die is limited. Therefore, a need exists for a packaged semiconductor device for stacked die having improved thermal dissipation.
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